1 idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver industrial temperature range september 2004 2004 integrated device technology, inc. dsc-5864/15 c idt49fct3805d/e industrial temperature range 3.3v cmos dual 1-to-5 clock driver functional block diagram 5 oa 1 - oa 5 ob 1 - ob 5 oe a in a oe b in b mon 5 pin configuration oa 1 oa 3 oa 4 gnd q in a v cca oa 2 gnd a oa 5 oe a 1 2 3 4 5 6 7 8 9 ob 3 ob 4 mon in b v ccb ob 1 ob 2 gnd b ob 5 oe b 11 12 13 14 15 16 17 18 19 20 10 ssop/ qsop top view features: ? advanced cmos technology ? guaranteed low skew < 200ps (max.) ? very low propagation delay < 2.5ns (max) ? very low duty cycle distortion < 270ps (max) ? very low cmos power levels ? operating frequency up to 166mhz ? ttl compatible inputs and outputs ? inputs can be driven from 3.3v or 5v components ? two independent output banks with 3-state control ? 1:5 fanout per bank ? "heartbeat" monitor output ?v cc = 3.3v 0.3v ? available in ssop and qsop packages the idt logo is a registered trademark of integrated device technology, inc. description: the fct3805 is a 3.3 volt clock driver built using advanced cmos technology. the device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. the device has a "heartbeat" monitor for diagnostics and pll driving. the mon output is identical to all other outputs and complies with the output specifications in this document. the fct3805 offers low capacitance inputs. the fct3805 is designed for high speed clock distribution where signal quality and skew are critical. the fct3805 also allows single point-to-point transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. for more information on using the fct3805 with two different input frequencies on bank a and b, please see an-236.
2 industrial temperature range idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver capacitance (t a = +25 o c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 3 4 pf c out output capacitance v out = 0v ? 6 pf note: 1. this parameter is measured at characterization but not tested. pin description pin names description oe a , oe b 3-state output enable inputs (active low) in a , in b clock inputs oan, obn clock outputs m o n monitor output function table (1) inputs outputs oe a , oe b in a , in b oan, obn mon llll lhhh hlzl hh zh note: 1. h = high l = low z = high-impedance absolute maximum ratings (1) symbol description max unit v cc input power supply voltage ?0.5 to +4.6 v v i input voltage ?0.5 to +5.5 v v o output voltage ?0.5 to v cc +0.5 v t j junction temperature 150 c t stg storage temperature ?65 to +165 c note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc electrical characteristics over operating range following conditions apply unless otherwise specified industrial: t a = -40c to +85c, v cc = 3.3v 0.3v symbol parameter test conditions (1) min. typ. (2) max. unit v ih input high level 2 ? 5.5 v v il input low level ?0.5 ? 0.8 v i ih input high current v cc = max. v i = 5.5v ? ? 1 i il input low current v cc = max. v i = gnd ? ? 1a i ozh high impedance output current v cc = max. v o = v cc ?? 1 i ozl (3-state outputs pins) v o = gnd ? ? 1 v ik clamp diode voltage v cc = min., i in = ?18ma ? ?0.7 ?1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3,4) ?45 ?74 ?180 ma i odl output low current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3,4) 50 90 200 m a i os short circuit current v cc = max., v o = gnd (3,4) ?60 ?135 ?240 ma v oh output high voltage v cc = min. i oh = ?12ma 2.4 (5) 3? v in = v ih or v il i oh = ?8ma 2.4 (5) 3?v i oh = ?100 av cc - 0.2 ? ? v ol output low voltage v cc = min. i ol = 12ma ? 0.3 0.4 v in = v ih or v il i ol = 8ma ? 0.2 0.4 v i ol = 100 a ? ? 0.2 notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 3.3v, 25 c ambient. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = vcc -0.6v at rated current.
3 idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver industrial temperature range notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice type. 2. typical values are at v cc = 3.3v, +25c ambient. 3. this parameter is not directly testable, but is derived for use in total power supply calculations. 4. i c = i quiescent + i inputs + i dynamic i c = i cc + ? i cc d h n t + i ccd (f o n o ) i cc = quiescent current (i ccl , i cch and i ccz ) ? i cc = power supply current for a ttl high input (v i n = v cc -0.6v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f o = output frequency n o = number of outputs at f o power supply characteristics symbol parameter test conditions (1) min. typ. (2) max. unit i ccl quiescent power supply current v cc = max. ? 0.1 30 a i cch v in = gnd or v cc i ccz ? i cc power supply current per input high v cc = max. ? 45 300 a v in = v cc ? 0.6v i ccd dynamic power supply current v cc = max. v in = v cc ? 80 120 a/mhz per output (3) c l = 15pf v in = gnd all outputs toggling i c total power supply current (4) v cc = max. v in = v cc ? 125 150 c l = 15pf v in = gnd all outputs toggling v in = v cc ? 0.6v ? 125 150 fi = 133mhz v in = gnd ma v cc = max. v in = v cc ? 155 195 c l = 15pf v in = gnd all outputs toggling v in = v cc ? 0.6v ? 160 195 fi = 166mhz v in = gnd
4 industrial temperature range idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver switching characteristics over operating range - 3805d (3,4) symbol parameter conditions (1) min . (2) max . unit t plh propagation delay c l = 15pf 1 3 ns t phl in a to oan, in b to obn f 133mhz t r output rise time (0.8v to 2v) ? 1.5 ns t f output fall time (2v to 0.8v) ? 1.5 ns t sk(o) same device output pin to pin skew (5) ? 270 ps t sk(p) pulse skew (6,9) ? 270 ps t sk(pp) part to part skew (7) ? 550 ps t pzl output enable time ? 5.2 ns t pzh oe a to oan, oe b to obn t plz output disable time ? 5.2 ns t phz oe a to oan, oe b to obn f max input frequency ? 133 m h z notes: 1. see test circuits and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. t plh , t phl , t sk ( p ), and t sk ( o ) are production tested. all other parameters guaranteed but not production tested. 4. propagation delay range indicated by min. and max. limit is due to v cc , operating temperature and process parameters. these propagation delay limits do not imply skew. 5. skew measured between all outputs under identical transitions and load conditions. 6. skew measured is difference between propagation delay times t phl and t plh of same outputs under identical load conditions. 7. part to part skew for all outputs given identical transitions and load conditions at identical v cc levels and temperature. 8. airflow of 1m/s is recommended for frequencies above 133mhz. 9. this parameter is measured using f = 1mhz. switching characteristics over operating range - 3805e (3,4) symbol parameter conditions (1,8) min . (2) max . unit t plh propagation delay c l = 15pf 0.5 2.5 ns t phl in a to oan, in b to obn f 166mhz t r output rise time (0.8v to 2v) ? 1 ns t f output fall time (2v to 0.8v) ? 1 ns t sk(o) same device output pin to pin skew (5) ? 200 ps t sk(p) pulse skew (6,9) ? 270 ps t sk(pp) part to part skew (7) ? 550 ps t pzl output enable time ? 5.2 ns t pzh oe a to oan, oe b to obn t plz output disable time ? 5.2 ns t phz oe a to oan, oe b to obn f max input frequency ? 166 m h z
5 idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver industrial temperature range t plh1 output 1 output 2 t sk(o) t plh2 3v 0v v oh 1.5v 1.5v v ol v oh 1.5v v ol input t phl1 t phl2 t sk(o) t sk(o) = |t plh2 - t plh1 | or |t phl2 - t phl1 | c l v out v cc pulse generator d.u.t v in r t r l v cc pulse generator d.u.t v in r t c l 6v gnd v out r l 500 ? 500 ? open c l = 15pf test circuit test circuits and waveforms enable and disable time circuit test switch disable low 6v enable low disable high gnd enable high switch position output skew - t sk(o) test conditions symbol v cc = 3.3v 0.3v unit c l 15 pf r t z out of pulse generator ? r l 33 ? t r / t f 1 (0v to 3v or 3v to 0v) ns definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. t r / t f = rise/fall time of the input stimulus from the pulse generator.
6 industrial temperature range idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver control input output normally low output normally high 3v 1.5v 0v v oh v ol switch closed switch open v oh 0.3v 0.3v t plz t pzl t pzh t phz v oh v ol 1.5v 1.5v enable disable input t plh1 package 1 output t sk(pp) t plh2 1.5v v ol t phl2 t sk(pp) = |t plh2 - t plh1 | or |t phl2 - t phl1 | package 2 output 3v 0v v oh 1.5v 1.5v v ol v oh t phl1 3v 0v v oh t plh t phl v ol 1.5v 1.5v t r t f 2.0v 0.8v input output 3v 0v v oh t plh t phl v ol 1.5v 1.5v input output t sk(p) = |t plh - t plh | v ol t sk(pp) enable and disable times part-to-part skew - t sk(pp) note: 1. diagram shown for input control enable-low and input control disable-high propagation delay test circuits and waveforms pulse skew part-to-part skew is for the same package and speed grade.
7 idt49fct3805d/e 3.3v cmos dual 1-to-5 clock driver industrial temperature range ordering information idt49fct x package device type 3805d 3805e 3.3v cmos dual 1-to-5 clock driver py q shrink small outline ic quarter-size small outline ic xxxx x process i -40c to +85c (industrial) corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com
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